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FBGA/FLGA

Features and Appealing Points

Packages where a semiconductor chip is mounted on the glass epoxy substrate and is sealed with transfer mold after circuit wiring by wire bonding.
The pins are arranged on the bottom surface of the substrate in an area form.
LAPIS Semiconductor recommends FLGA using solder/Pb-free coated pins for packages with an external size of 10mm or less and FBGA using solder/Pb-free balls with an external size exceeding 10mm.
In each package, MCP (Multi Chip Package) using lamination structure can also be supported.

Examples of Packages

package photo

Line-up

  • FBGA family
    PKG Size Pin Count Pin Pitch Pin Arrangement Package Code Status
    6×6mm 60 pin 0.5mm 2 rows in periphery P-LFBGA64-0606-0.50 Volume
    production
    7×7mm 48 pin 0.8mm 2 rows in periphery P-LFBGA48-0707-0.80
    8×8mm 160 pin 0.5mm 4 rows in periphery P-TFBGA160-0808-0.50
    9×9mm 84 pin 0.8mm 3 rows in periphery P-LFBGA84-0909-0.80
    9×9mm 120 pin 0.65mm 3 rows in periphery P-TFBGA120-0909-0.65
    11×11mm 144 pin 0.8mm 4 rows in periphery P-LFBGA144-1111-0.80
    11×11mm 176 pin 0.65mm 4 rows in periphery P-LFBGA176-1111-0.65
    13×13mm 144 pin 0.8mm 3 rows in periphery P-LFBGA144-1313-0.80
    13×13mm 224 pin 0.65mm 4 rows in periphery P-LFBGA224-1313-0.65
    15×15mm 224 pin 0.8mm 4 rows in periphery P-LFBGA224-1515-0.80
  • FLGA family
    PKG Size Pin Count Pin Pitch Pin Arrangement Package Code Status
    7×7mm 48 pin 0.8mm 2 rows in periphery P-TFLGA48-0707-0.80 Volume
    production
    8×8mm 56 pin 0.8mm 2 rows in periphery P-TFLGA56-0808-0.80
    9×9mm 84 pin 0.8mm 3 rows in periphery P-TFLGA84-0909-0.80

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